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| www.irf.com 1 descriptionspecifically designed for industrial applications, this hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely lowon-resistance per silicon area. additional features of this design are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating . these features com- bine to make this design an extremely efficient and reliable device for use in industrial applications and a wide variety of other applications. features advanced process technology ultra low on-resistance 175c operating temperature fast switching repetitive avalanche allowed up to tjmax pd - 97175b irlr3110zpbfirlu3110zpbf hexfet ? power mosfet v dss = 100v r ds(on) = 14m s d g d-pak irlr3110zpbf i-pak irlu3110zpbf absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) a i d @ t c = 25c continuous drain current, v gs @ 10v (package limited) i dm pulsed drain current p d @t c = 25c power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as (thermally limited) single pulse avalanche energy mj e as (tested ) single pulse avalanche energy tested value i ar avalanche current a e ar repetitive avalanche energy mj t j operating junction and t stg storage temperature range c reflow soldering temperature, for 10 seconds mounting torque, 6-32 or m3 screw thermal resistance parameter t y p. max. units r jc junction-to-case CCC 1.05 r ja junction-to-ambient (pcb mount) CCC 40 c/w r ja junction-to-ambient CCC 110 140 110 see fig.12a, 12b, 15, 16 140 0.95 16 max. 6345 250 42 -55 to + 175 300 10 lbf in (1.1n m) downloaded from: http:/// 2 www.irf.com s d g s d g el ectr i ca l ch aracter i st i cs @ t j = 2 5 c ( un l ess ot h erw i se spec ifi e d) parameter min. t y p. max. units v (br)dss drain-to-source breakdown volta g e 100 CCC CCC v ? v (br)dss / ? t j breakdown volta g e temp. coefficient CCC 0.077 CCC v/c r ds(on) static drain-to-source on-resistance CCC 11 14 m CCC 12 16 v gs(th) gate threshold volta g e 1.0 CCC 2.5 v g fs forward transconductance 52 CCC CCC s i dss drain-to-source leaka g e current CCC CCC 20 a CCC CCC 250 i gss gate-to-source forward leaka g e CCC CCC 200 na gate-to-source reverse leaka g e CCC CCC -200 q g total gate char g e CCC 34 48 q gs gate-to-source char g e CCC 10 CCC nc q gd gate-to-drain ("miller") char g e CCC 15 CCC t d(on) turn-on dela y time CCC 24 CCC t r rise time CCC 110 CCC t d(off) turn-off dela y time CCC 33 CCC ns t f fall time CCC 48 CCC l d internal drain inductance CCC 4.5 CCC between lead, nh 6mm (0.25in.) l s internal source inductance CCC 7.5 CCC from packa g e and center of die contact c iss input capacitance CCC 3980 CCC c oss output capacitance CCC 310 CCC c rss reverse transfer capacitance CCC 130 CCC pf c oss output capacitance CCC 1820 CCC c oss output capacitance CCC 170 CCC c oss eff. effective output capacitance CCC 320 CCC source-drain ratin g s and characteristics parameter min. t y p. max. units i s continuous source current CCC CCC 63 (body diode) a i sm pulsed source current CCC CCC 250 (body diode) v sd diode forward volta g eC C C C C C 1 . 3 v t rr reverse recover y t i m e C C C3 45 1n s q rr reverse recover y char g e CCC 42 63 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) v gs = 4.5v, i d = 32a v gs = 16v v gs = -16v v ds = 50v v ds = 25v, i d = 38a i d = 38a conditions v gs = 4.5v v gs = 0v v ds = 25v ? = 1.0mhz v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 0v, v ds = 80v, ? = 1.0mhz v gs = 0v, v ds = 0v to 80v mosfet symbol showing the integral reverse p-n junction diode. t j = 25c, i s = 38a, v gs = 0v t j = 25c, i f = 38a, v dd = 50v di/dt = 100a/ s conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 38a v ds = v gs , i d = 100a v ds = 100v, v gs = 0v v ds = 100v, v gs = 0v, t j = 125c v gs = 4.5v v dd = 50v i d = 38a r g = 3.7 downloaded from: http:/// www.irf.com 3 fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.5v 60s pulse width tj = 175c vgs top 15v 10v 8.0v 4.5v 3.5v 3.0v 2.7v bottom 2.5v 0 2 4 6 8 10 12 14 16 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 60s pulse width 0 2 55 07 5 i d ,drain-to-source current (a) 0 25 50 75 100 125 150 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 10v 300s pulse width 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 4.5v 3.5v 3.0v 2.7v bottom 2.5v 60s pulse width tj = 25c 2.5v downloaded from: http:/// 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 0 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100sec 1msec 10msec dc 0 1 02 03 04 0 q g total gate charge (nc) 0.0 1.0 2.0 3.0 4.0 5.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v v ds = 50v i d = 38a downloaded from: http:/// www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. normalized on-resistance vs. temperature -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 3.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 63a v gs = 10v 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.383 0.0002670.667 0.003916 j j 1 1 2 2 r 1 r 1 r 2 r 2 c ci i / ri ci= i / ri 25 50 75 100 125 150 175 t c , case temperature (c) 0 10 20 30 40 50 60 70 i d , d r a i n c u r r e n t ( a ) limited by package downloaded from: http:/// 6 www.irf.com q g q gs q gd v g charge fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs 1k vcc dut 0 l 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 4.4a 6.5a bottom 38a -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 100a i d = 250a i d = 1.0ma i d = 1.0a downloaded from: http:/// www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type.2. safe operation in avalanche is allowed as long as neither tjmax nor iav (max) is exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse.5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 25 50 75 100 125 150 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 38a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? tj = 150c and tstart =25c (single pulse) downloaded from: http:/// 8 www.irf.com fig 17. ! " for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period # # + - + + + - - - ? ? !"!! ? # $$ ? !"!!% " v ds 90%10% v gs t d(on) t r t d(off) t f &' 1 ( # 0.1 % + - fig 18a. switching time test circuit fig 18b. switching time waveforms downloaded from: http:/// www.irf.com 9 !"#$$ %&'('!" ) $! ! " * +, !"-!.# $ #-/ 0 1 2 / downloaded from: http:/// 10 www.irf.com !"#$ #! %##& ' ( && )"#*& & !$$#+,-.- #/)$ " ) 0 * ( ( 1234 downloaded from: http:/// www.irf.com 11 data and specifications subject to change without notice. this product has been designed for th e industrial market. qualification standards can be found on irs web site. tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 11/09 repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). limited by t jmax , starting t j = 25c, l = 0.16mh r g = 25 , i as = 38a, v gs =10v. part not recommended for use above this value. pulse width 1.0ms; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. this value determined from sample failure population. 100% tested to this value in production. when mounted on 1" square pcb (fr-4 or g-10 material). ) !"# downloaded from: http:/// |
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